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Were looking for people who are relentlessly curious and committed to continuous learning. AI is reshaping every function across our business, and we enable every team member, regardless of role or level, to build fluency in AI tools and concepts. Those who thrive here actively seek out new solutions, experiment thoughtfully, and apply what they learn to drive better, faster, smarter outcomes.
As a Senior Engineering Manager - Windows Endpoint, you will be tasked with taking end-to-end ownership of product capabilities and strategic initiatives from ideation to production, within the Windows Endpoint Ecosystem (our flagship productline, recognized 6x in-a-row Gartner MQ Leader). You should be an experienced leader with a proven track record of success in building and developing high-performing managers and teams, managing operational risks, and driving architectural excellence while fostering a world-class engineering culture.

Were looking for people who are relentlessly curious and committed to continuous learning. AI is reshaping every function across our business, and we enable every team member, regardless of role or level, to build fluency in AI tools and concepts. Those who thrive here actively seek out new solutions, experiment thoughtfully, and apply what they learn to drive better, faster, smarter outcomes.
As a Senior FinOps Engineer, you will be tasked with being a key architect of our financial sustainability. You won't just track spend, you will build the frameworks that transform complex cloud and usage data into clear, actionable strategies for the business. Joining our global FinOps team, you will act as the bridge between Product Engineering, Finance, and Leadership, ensuring our hyper-growth is matched by world-class unit economics and cloud efficiency.

The AI Forward Deployed Engineer (FDE) is responsible for driving the successful adoption of AI solutions across our Groups business units.

The role focuses on translating business needs into practical AI solutions and ensuring they are effectively embedded into real workflows, delivering measurable business impact.

FDEs work closely with business teams to identify high‑value opportunities, deploy and build customized AI solutions, and continuously improve outcomes. Success is measured by adoption, usage, tech quality and business value.


Key Responsibilities
Partner with business units and tech teams to identify and prioritize AI use cases.
Own AI initiatives end‑to‑end: from problem definition to deployment and impact measurement.
Deploy and adapt AI solutions to fit real operational workflows.
Drive user adoption through training, iteration, and feedback.
Support continuous improvement and scaling of successful solutions.

Were looking for people who are relentlessly curious and committed to continuous learning. AI is reshaping every function across our business, and we enable every team member, regardless of role or level, to build fluency in AI tools and concepts. Those who thrive here actively seek out new solutions, experiment thoughtfully, and apply what they learn to drive better, faster, smarter outcomes.
This position represents Prompt Security, our comprehensive GenAI security platform, helping enterprise organizations safely and efficiently adopt GenAI. The company was recently acquired , the AI cybersecurity leader, to further advance its Generative AI and Agentic AI security strategy.
we are seeking a Sales Engineer to join our EMEA go-to-market team. You'll be navigating an exciting landscape where innovation is constant, and the ability to adapt and iterate quickly is not just an advantage-it's a necessity. In this role, you will be instrumental in driving technical pre-sales activities, helping customers understand and implement our GenAI security solutions across various use cases. We're looking for someone who thrives in fast-paced environments, someone eager to tackle new challenges and pivot with ease. This is more than a job; it's a journey into the future of cybersecurity, offering unparalleled opportunities for growth, learning, and impact.

What if your Python automation caught a critical ASIC bug before the physical silicon was even manufactured? Our simulation platforms make that happen every release cycle! We are the System Ethernet QA Team in our R&D center, responsible for the testing and qualification of virtual networking silicon (SimX) and software-from L2 forwarding and L3 routing to overlays, QoS, and security. With SimX, developers and QA engineers get hardware-free, early access to the ASIC for better debugging.

We are looking for a Senior QA Software Engineer who combines network protocol expertise with strong Python automation skills. Does debugging a BGP EVPN route leak excite you as much as refactoring a test framework? Then we should talk!

What you'll be doing:

We don't just complete checklists; we collaborate closely with R&D to lead the quality of new features from design to deployment. In this role, we:

Review architectural designs and requirements for new features introduced to the product.

Drive the design, development, and execution of tests across functional, performance, and security scopes as part of SW GA and update releases.

Develop Python automation suites built on clean OOP principles.

Chase down defects and validate fixes until we fully resolve the root cause.

Leverage the SimX platform to validate code and debug the ASIC long before hardware arrives.

The Networking Advanced Development Software team develops new groundbreaking technologies to enable new market shares for the company and tighten customer relationships. These are emerging technologies in networking and distributed computing for the booming AI factories and data centers. They span areas such as AI neural networks, Deep Learning, High Performance Computing (HPC), Storage, Cloud, SW Defined Network, Network Function Virtualization, 5G NR and more. We develop the solutions top-down, all the way from application behavioral analysis, to architecture definition and down to the implementation, using the world-leading our devices. The development traverses any needed component - application SW, middleware SW, OS kernel subsystems, device drivers, embedded SW (Firmware) and CUDA GPU. We collaborate with partners and key customers in the analysis processes and engage with open source communities introducing our leading features.

What youll be doing:

Lead a team of 5 engineers in the advanced technologies development.

Design and implement solutions throughout all layers from high level application, OS and driver subsystem to firmware.

Work on impactful projects involving state-of-the-art high-performance computing hardware and software.

Provide insight and technical guidance and collaborate with peers from across the company - including software architecture, chip architecture, and engineering departments to improve our future technology.

Collaborate with our partners and customers.

We are now looking for a Senior verification technical lead for our FC Switch Silicon team. As a FullChip verification technical lead Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a FC verification team within the Switch silicon.

Dynamic verification environments planning for units infrastructures and system level.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.

Responsible to drive the FullChip verification execution, including staging plan of the projects and deliveries.

We are building the software foundation for the next generation of AI infrastructure. As AI workloads continue to evolve, Kubernetes and the cloud-native ecosystem must evolve with them.

Our teams mission is to make Kubernetes the best platform for AI workloads. We work upstream with the Kubernetes and CNCF communities to design new APIs, build production-grade implementations, and shape the future of cloud-native infrastructure for AI.

As a Senior Software Engineer, you'll tackle the most challenging problems at the intersection of Kubernetes, distributed systems, and AI infrastructure.


What you'll be doing:

Design, implement, and upstream new capabilities for Kubernetes and CNCF projects.

Collaborate with engineering teams across us to identify AI infrastructure challenges and solve them through upstream innovation.

Work closely with Kubernetes SIGs, Working Groups, and the broader open-source community to design and implement new capabilities.

Participate in architecture discussions, API design, technical proposals, and code reviews.

Build reliable, scalable infrastructure software for next-generation AI workloads.

Write clear technical documentation and design proposals.

Our Advanced Development Network Engineer role in Israel offers a special chance to contribute to large-scale network simulations for innovative AI datacenter research and development. You will be part of a dynamic team that values creativity and collaboration. If you are enthusiastic about technology and eager to build a significant difference, this is the place for you!


What you'll be doing:

Developing a brand new digital twin powered by CUDA technology for advanced research on data centers.

Collaborating with a team of extraordinary engineers and researchers to develop and implement innovative solutions.

Partnering with diverse teams to ensure smooth integration and deployment of network solutions.

Continuously exploring new technologies and methodologies to improve our network capabilities.

Our Networking team is looking for an outstanding candidate who thrives in a multifaceted environment, to facilitate managing SW Releases for our leading SW products by taking responsibility for cross projects activities. In addition, ensure releases are delivered on time and in high quality, coordinate between development and testing groups and between global SW groups. The role will require to gain good understanding of products dependencies.

What youll be doing:
Be an effective leader in crafting and driving a delivery of high quality SW in an efficient way.
Collaborate with Engineering, Operations, Architecture and Marketing across the globe to coordinate the release of products and ensure release will meet the schedule and with high quality. In parallel, partner with the QA teams to ensure alignment of all tests between the development, verification and QA groups.
Take full ownership of projects from kickoff to signoff.
Manage multiple parallel releases with strong attention to detail, ensuring clarity, alignment, and consistent communication across teams while tracking dependencies, milestones, and deliverables.
Maintain clear, up-to-date visibility of the release status, ensuring all stakeholders have an accurate understanding of progress, next steps, priorities, and risks at any given time.
Support Senior Release Managers with release activities.
Own and manage selected cross-products topics (e.g., customer bugs, release checklists, RCAs, Triage, define and improve processes).
Conduct release meetings and communicate release status. Resolve issues when they appear and raise red flags when needed. Work with planning and tracking systems to lead the release progress, and build release indicators.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Formal Verification Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the formal verification strategy for chips that power the world's largest AI clusters.
As the Formal Verification Engineer, you will be a foundational member of our Israel R&D center. You wont just execute tasks; you will define the Formal verification strategy for chips that drive the worlds largest AI clusters. You will dive deep into the technical details, proving the correctness of complex designs and ensuring they flawlessly meet specifications.
Key Responsibilities
Own and develop formal verification environments from scratch through to sign-off
Apply formal verification methodologies and strategies to prove the correctness of intricate designs
Work closely with the Architecture, Design, and DV teams to identify verification needs and pinpoint design requirements
Create robust formal environments, analyze complex RTL designs, and apply advanced formal techniques to find corner-case bugs
Analyze verification results, identify failures, and collaborate directly with designers to resolve issues efficiently
Architect and develop generic, common formal functions and properties to be reused across multiple projects.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Front-End CAD Engineer to join our local engineering powerhouse from the ground up.
As a Front-End CAD Engineer, you will be the backbone of our chip design ecosystem. You wont just be using tools; youll be architecting the methodologies, automation scripts, and design flows that enable our hardware teams to push the limits of silicon performance. Your work directly impacts the productivity of the design team and the time-to-market for our next-generation processors.
Key Responsibilities
Develop, maintain, and optimize RTL generation tools, building automated IPs and SoC schemes
Create robust applications using Python and Tcl to automate models build, regression and analysis tools and other assisting tools for all disciplines in front-end flows
Evaluate and integrate Electronic Design Automation (EDA) tools from vendors like Cadence, Synopsys, and Mentor Graphics
Define the methodologies of usage and integrate AI tools in this fast-growing field impacting all VLSI development flows.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Package Design Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, Driving the physical implementation strategy for chips that power the world's largest AI clusters.
As a Package Design Engineer, you will be a core technical contributor in the development of advanced IC packaging solutions for high-performance connectivity silicon. You will execute the package flow, design, and qualification from concept through production, working closely with silicon, signal integrity, power integrity, mechanical, manufacturing, and external OSAT partners. You will be responsible for implementing package technologies that meet aggressive electrical, thermal, mechanical, and cost targets, enabling our company products to operate reliably in the worlds most demanding AI and cloud environments.
Key Responsibilities
Execute end-to-end IC package design, from early feasibility and detailed design through to qualification and high-volume manufacturing
Implement package architecture and utilize advanced technologies (organic substrates, advanced laminate, interposers, multi-die/chiplet packaging, CoWoS - 2.5D/3D integration)
Drive signal integrity (SI), power integrity (PI), and thermal considerations at the package level for high-speed, high-power devices
Perform package layout, substrate routing, bump/ball maps, stack-ups, materials selection, and apply mechanical constraints
Collaborate closely with silicon design, SerDes, system, SI/PI, and reliability teams to optimize overall product performance
Interface directly with OSATs, substrate vendors, and manufacturing partners to ensure design-for-manufacturability (DFM), yield, and cost targets are met
Conduct package-related risk assessments, failure analysis, and corrective actions during bring-up and production ramp
Support NPI, qualification, and product sustainment activities, including vendor technical reviews.

1. AI Architecture & Technical Leadership

Guide AI architectural direction across platform, focusing on system design, model lifecycle, and integration of AI components into product workflows.
Act as a senior technical reviewer and thought partner for complex or cross-team AI design decisions.
Provide technical oversight on areas such as exploring new models/technologies/opportunities for the company
Surface architectural risks, tradeoffs, and long-term implications, including cost, security and compliance aspects and clearly advise the VP of AI when certain technical directions should not be pursued.
This role influences judgment, clarity, and experience, not through blocking authority.

2. Hands-on Applied Innovation (Core Pillar | ~50%)

Spend at least 50% of time hands-on, building:
End-to-end AI prototypes
Technical demos and proofs of concept
Exploratory implementations of new AI capabilities
Drive applied innovation that:

De-risks new technologies
Demonstrates feasibility and impact
Informs product direction and business opportunities
Build fast, concrete examples that teams can learn from and extend.
Transition successful prototypes to team ownership for further development and scaling.
This role is expected to lead AI innovation by doing, while working closely with product, medical and engineering

3. Best Practices & Technical Enablement

Define and promote best practices for applied AI development, including:
Rapid prototyping and vibe coding.
Agent design, orchestration, and evaluation patterns
Experimentation, benchmarking, and validation workflows
Help teams align on shared technical patterns, tools, and standards.
Identify opportunities to consolidate duplicated efforts and improve cross-team coherence.
Lead technical deep dives, architecture discussions, and design reviews.
4. AI Compliance & Regulatory Enablement (Technical Scope)

Ensure Navinas AI development practices align with applicable AI regulations for a software product handling sensitive medical data.
Define and guide AI-specific compliance practices, including data usage, transparency, evaluation, and documentation expectations.
Support and contribute to AI-related compliance and regulatory documentation, in close collaboration with Legal, Security, and Medical Research teams.
Serve as a technical point of reference for AI compliance questions.