לוח משרות דרושים מהנדסים בשרון

Requirements:
Experience in working with PLC and HMI
Experience in working with PLCs programming software (CX one / Studio 5000 / Step 7)
Experience in Windows programming Big advantage
Knowledge of various PLCs manufacturers and programming SW (Rockwell / Siemens / Omron / schneider electric ) Advantage

Requirements:
Scientific or engineering degree in Computer Science/Bio Medical (or equivalent) from a well-known university/college
At least 5 years experience working as a SW testing engineer.
Experience with SW life-cycle procedures and documentation.
Keen interest in testing and quality issues.
MSc. in related field an advantage.
Experience in bio-medical system testing advantage.
Formal testing certification (ISTQB) advantage.
Experience with manual testing advantage.
Code/batch writing ability advantage.
Technical ability in operating complex software and hardware- advantage.
Fast learner with can do approach.
Ability to work in a dynamic environment.
Excellent communication and interpersonal skills.
High-level self-learning and working independently.
English Excellent written and oral skills a must.
Good analytic and problem-solving skills.
Excellent team player with the ability to work independently.

Requirements:
B.Sc in Computer Science/Software Engineering from a leading university
At least 7 years of experience in software development
Working knowledge of agile methodology, techniques, and frameworks, such as Scrum or Kanban, to deliver solutions.
Solid knowledge of SW design and Object-Oriented Programming
Experience in .Net framework and C#
Experience in C++
Excellent people and project management skills.
Knowledge of professional software engineering practices & best practices for the entire software development life cycle.
Participating in medical device software development/project a significant advantage.

Requirements:
Bachelor degree or higher in Computer Engineering / Computer Science or equivalent
5+ years of experience in implementation and design of SW / SW+HW systems (mainly in C / C++)
Hands on experience with compilers design and architecture
5+ years of experience developing for LLVM + Clang
5+ years of proven experience working with CPU instruction set architecture and assembly language
System view and profound understanding of related technologies
Hands-on system design and PoC bring-up experience
Excellent communications skills and ability to work as part of an international team
Innovation, fast learning skills
Ways to stand out from the crowd:
M.Sc. or Ph.D. degree with expertise in fields related to compilation / static analysis
Experience in HW + SW systems co-design
Experience with developing gcc plugins
Experience in Linux kernel modifications / kernel modules development
5+ years of experience in software development in Linux environment
2+ years of experience in optimizing applications performance
Proficiency in C++ programming language
Understanding in multiprocessing and multithreaded code.

Requirements:
PhD or MSc in computer science or area related to computer architecture, or equivalent research experience in industry
At least 10 years of relevant research experience in industry or Academia
Ability to provide innovation and an international vision
Experience analyzing performance of new application and root cause of performance bottlenecks
Candidates should have research experience in at least one of the following areas:
- Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect
- Workload characterization and analytical model generation
- Heterogeneous Architectures and Systems for Datacenter
- Parallel, High-Performance, and Distributed Computing with an emphasis on hardware-software characterization, optimization and innovation
Excellent communication, presentation and reporting skills
Experience working with highly technical teams and communicating to non-technical partners
Excellent oral and written English.

Requirements:
PhD or MSc in computer science/EE or area related to computer architecture, or equivalent research experience in industry
At least 15 years of relevant research and development experience in industry and academia in the following areas:
- Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect
- Workload characterization and analytical model generation
- System Modelling and emulation of HW
- Simulation of Software workloads and Software applications on HW simulator
Ability to provide innovation and an international vision
Excellent communication, presentation and reporting skills
Experience working with highly technical teams and communicating to non-technical partners
Excellent oral ability to provide innovation and an international vision
Excellent communication, presentation and reporting skills
Excellent oral and written English. written English.

Requirements:
First and foremost - Team player with strong self-learning abilities
5+ years of web backend development experience, with strong Python expertise
Substantial experience working with leading RDBMS databases
Experience working in cloud based environment
Proven ability to mentor and lead other engineers
Deep understanding of object-oriented software development principles, methodologies and best practices, and SaaS architecture
Committed, striving toward goals, and accountable for results
Nice to have:
Experience working with Django framework Big advantage
Experience working with Flask framework
Experience with Frontend development, preferably Angular 2+
Knowledge and experience in RabbitMQ/Kafka/Redis in a in multi-processing environment
Experience in DevOps technologies, CI/CD, and test automation
BSc in computer science or equivalent

Requirements:
BSc. in Electrical Engineering (from known university)
Minimum 8 years of experience Must!
Logic design project leader or chip architect
Hands on RTL design with Verilog or System Verilog
Micro architecture definition in CPU/DSP environment
Knowledge in verification (System Verilog, System-C etc.)
Knowledge and experience in the following is advantage:
RTL for FPGA and emulation
AC spec definition
SDC timing constraints write from spec
RT C, C++ ,assembly
Experience with SOC design in DDR, USB, MIPI, ARM subsystem, AMBA, AXI, AHB, DSP, and ARC
Hands on spyglass, synthesis, STA, DFT
Experience with technical customers support or interface

Requirements:
5 years hands-on System Verilog RTL coding.
Experience with tools such as VCS, Verdi, and Spyglass.
Experience debugging and working with validation using UVM.
Experience with Multiple Clock Domains, multiple power domains, low power design.
Knowledge and experience in the following is advantage:
Experience with SoC design in DDR, USB, MIPI, ARM subsystem, AMBA, AXI, AHB, DSP, and ARC CPU
Experience with clock crossing interface like Gray FIFO, CDC.
Experience with Pre silicon Validation, UVM codding, Validation tools and methodology.
Experience in Full design cycle including BE design, Synthesis, Static Timing, floor planning, DFT integration.
RTL for FPGA and emulation
Experience with software and with C/C++ for reference model development. Developed drivers for ARM SoC IPs .

Requirements:
5 years of SoC System Verilog validation experience.
Hands on experience using UVM to verify ASICs.
Advanced knowledge of System Verilog test-bench language.
Experience with verification methodologies and tools such as simulators, waveform viewers, build/run automation, coverage collection, gate level simulations, formal validation.
Knowledge and experience in the following is advantage:
Experience with the full digital design verification cycle -- from spec through bring-up and prototyping and debug systems.
Experience with performance, power validation, digital design (RTL), and formal verification.
Experience with SOC design in DDR, USB, MIPI, ARM subsystem, AMBA, AXI, AHB, DSP, and ARC CPU
Experience with mixed signal verification methodology for IPs such as PHYs, A2D, PLLs etc.
Experience with software and C/C++ for reference model development. Developed drivers for ARM SoC IPs.

Requirements:
BSc. in Electrical Engineering (from known university)
Minimum 5 years of experience Must!
Technical management experience Advantage
Knowledge and experience in the following is advantage:
Floor plan and Place & Route, Block & Top level
Timing Closure & debug, STA, SDC insertion and analysis.
Clock Tree Synthesis
Power Grid Analysis
LVS/DRC Debug
DFT & ATPG methodologies (BIST, Scan, JTAG)
CAD Experience: Synopsys preferred , Cadence acceptable

Requirements:
BSc. in Electrical Engineering (from known university)
Minimum 2 years of experience Must!
Knowledge and experience in the following is advantage:
Floor plan and Place & Route
Timing Closure & debug, STA
Clock Tree Synthesis
Power Grid Analysis
LVS/DRC debug
Experience with DFT - Advantage
Experience with ICC Advantage

Requirements:
BSc. in Electrical Engineering (from known university)
Minimum 3 years of experience on DFT Must!
Knowledge and experience in the following is advantage:
Knowledge and experience with DFT methodologies (Scan, ATPG, @speed, memory BIST, I/O DFT)
Scan insertion and ATPG experience for stuck-at, transition delay, bridging and IDDQ
Coverage improvement and DFT DRC analysis using FTMAX / DFTCompiler / TetraMAX / SpyglassDFT - Memory BIST using Tessent MBIST (MentorGraphics)
Strong knowledge of JTAG 1149.1, 1149.6 and P1500 standards
Hands on design and implementation experience in DFT features
In depth understanding of DFT tool flows and methodologies (Synopsys or mentor or any other equivalent tools).Mentor Tessent MBIST experience is an added advantage
Hands on experience in end to end design flow (conception to TO to production) in DFT
Experience using Perl or other UNIX scripting languages for flow automation
Experience with Formal equivalence checking
Experience with setting up and running gate level simulations

Requirements:
* At least 5 years of experience in testing complex, distributed software systems (or 3 year testing storage systems)
* Practical knowledge of Linux or Unix-like operating systems
* Practical of computer networking knowledge
* Experience knowledge in setting up and maintaining software test environments
* An autodidact with strong communication skills
Preferred Qualifications:
* Experience as Sys-Admin, Support, Integration engineer or Professional services
* Knowledge of SAN and NAS protocols
* Experience with setup and administration of Active Directory
* Experience with virtualization technologies like VMWare/HyperV/KVM
* Experience with execution, debugging, and writing of scripts (Python/Bash)
* Experience with HW testing
* MCSE/CCNA/ISTQB or higher certifications
About Infinidat Award-winning Infinidat is a global provider of enterprise storage platforms and solutions. Installed in Global Fortune 500 companies around the world supporting a wide variety of applications and use cases, our software defined storage architecture delivers microsecond latency, autonomous automation, powerful cyber storage resilience, 100% guaranteed availability, and dramatically reduces enterprise storage CAPEX and OPEX.
The company’s portfolio has been named a Leader in the Gartner® Magic Quadrant™ for primary storage, has received the Gartner Peer Insights Customers’ Choice Award based on end-users’ ratings, as well as numerous other awards from the storage analyst and storage press community.
Our success continues to be based on the talent, experience, and motivation of employees who leverage their skills and abilities to make a real impact in the industry.
If you have the power to be the best of the best, we would love to have you join the Infinidat family and make a mark as an essential player in our company’s growth.