לוח משרות דרושים הייטק חומרה בחיפה

Requirements:
5+ years of experience in SoC or IP verification
Advanced knowledge of SoC architecture/design, in-depth knowledge of verification flows and broad system view
Expected to have a deep understanding and shown experience in advanced verification processes, including coverage driven and formal methods
Extensive experience with SystemVerilog and UVM
Experience with verification infrastructure development
Knowledge of storage IPs and control oriented design - an advantage
Knowledge of formal, hardware acceleration an advantage
Scripting and programming experience using several of the following: Perl, Python, Verilog, SystemVerilog, C, C++, and TCL

Requirements:
Technical knowledge in any Interface IP such as PCIe, USB, MIPI, HBM or DDR.
Be familiar with the various stages in the Application-Specific Integrated Circuit design process, including Protocols, Specification, Design, Verification, and Integration.
Excellent organization and solid communication skills are required for customers interactions.
Proven track record in meeting tight schedules and handling projects in parallel.
Experience working with DDR Design, including design, verification, silicon bring-up, and hardware debug.

Requirements:
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

Preferred Minimum Qualifications:
2-7 years of significant logic design engineering experience.
Knowledge in digital design domain, preferably from the field of ASIC design front end activities.
Hands on experience in micro-architecture definition from specification, RTL development and debug.

Preferred Qualifications:
Experience in RTL implementation in image processing domain (pixel processing, filters, convolution).
Experience in scalable design implementation (definition and coding).
Experience in digital design tools for the following flows: simulation, dynamic verification, synthesis, linting, timing analysis and formal verification.
Ability to work in a team.
Ability to understand system wise aspects like interaction of HW with SW and FW.

Requirements:
PhD or MSc in computer science or area related to computer architecture, or equivalent research experience in industry
At least 15 years of relevant research experience in industry or academia
Ability to provide innovation and an international vision
Record of publishing research papers in computer architecture, microarchitecture and/or related areas:
- Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect
- Hardware accelerators for emerging workloads(include but not limited to memory database、vector database recommendation system、LLM)
- Workload characterization and analytical model generation
- Heterogeneous Architectures and Systems for Datacenter
- Parallel, High-Performance, and Distributed Computing with an emphasis on hardware-software characterization, optimization and innovation
Successful researching leadership experience in a team management position
Excellent communication, presentation and reporting skills
Experience working with highly technical teams and communicating to non-technical partners
Experience working with highly technical teams and communicating to non-technical partners.

Requirements:
REQIRED
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MINIMAL REQUIREMENTS
At least 15 years of hands on experience as RTL/Architect of complicated SoCs
Solid understanding in SoC parts (DDR, L3 cache, GPU .)
Proven experience of owning whole SoC units/architecture
Good understanding of SW (e.g. C, C++)
Ability to make tradeoffs between power size and performance
REQUIREMENTS
At least 15 years of hands on experience as RTL/Architect of complicated SoCs
Excellent Verbal and written communication skills
Co-operate and communicate well with different groups from different countries.
Advantage:
Familiar with Core Architecture
Familiar with CPU SoC Architecture
Familiar with Mobile devices
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Experience in modelling SoC using high-level language.

Requirements:
REQUIERD
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Good understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store units, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory controller.
Good understanding of high speed digital VLSI design flow and methodology
Understanding of trade-offs between power, performance and area appropriately to meet the requirements of the product.
At least 6 years of experience in one of the leading CPU companies
Familiarity with the ARM\IA architecture and the micro-architecture for current ARM\IA CPU cores.
Software development (C, assembly).
Hands on experience as a Front end ASIC designer
DESIRED
Co-operate and communicate well with the architecture team and other members of the development.
Excellent verbal and written communication skills.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
B.Sc. in Electrical Engineering (or equivalent academic degree)
10+ years in VLSI design (less can be accepted in case of a unique candidate).
At least 5 years as Architect.
Ability to make trade-offs between power, performance, and area appropriately to meet the requirements of the product.
Experience with AI - Mandatory.
Advantages:
Experience with High level design languages like System-c an advantage.
Hardware accelerator development.

Requirements:
MINIMAL REQUIREMENTS
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Good understanding of CPU design methodology
Excellent verbal and written communication skills.
CPU related Experience in one of the leading CPU companies or in academia.
Willing to relocate to China for extended period.
REQUIREMENTS
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Experience modeling microprocessors using higher-level languages, like C/C++.

Requirements:
MINIMAL REQUIREMENTS
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
At least 20 years of experience in one of the leading CPU companies
REQUIREMENTS
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
QUALIFICATIONS
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MINIMAL REQUIREMENTS:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
Ownership of the overall verification methodology for a CPU project.
REQUIREMENTS
MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Minimum of 10 years of proven design experience in complex processor projects.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to US, Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
Bachelor's degree in Electrical or Computer Engineering
6+ years of experience in firmware verification & validation in both Pre-Si and Post-Si environments
Solid programming foundations in C, Python and Shell scripts
Team player with very good communication skills
Advantages

Experience in FW development
VLSI or FPGA development, Verilog programming
Familiar with more than one Microcontroller architectures (ARM, RISC-V, etc.)
Experience with build systems (e.g. gnumake, cmake)
Responsibilities

Design and lead the development of an automated firmware verification test environment, including automated test analysis & reporting for CI/CD integration.
Define and create detailed test plans for FW features that includes unit testing, component testing with RTL simulation and end-to-end system validation with FPGA.
Execute product test cycles and test plans, and be responsible for customers releases sign-off.
Collaborate with FW design & architecture on implementation and enhancement of debug, tracing, and profiling features.
Support FW design team by reproducing customer issues and assisting in debugging.

Requirements:
Please attach your Grades Sheet to your application
Bachelor's degree in electrical engineering (graduate to up to 3 years of experience)
Prior work experience in circuit design is a plus.
Strong understanding of circuit theory and design architectures.
Excellent problem-solving skills and attention to detail.
Effective communication skills and ability to work in a team environment.
Proficiency in circuit design tools (e.g., Cadence Virtuoso, Synopsys Custom Compiler) is a plus.
Unix skills is a plus
Fluent English

Responsibilities
To develop IPs (Hard IP/Soft IP) in advanced process nodes (from definition, through design, post layout simulations, to full integration)
To work with experienced designers in the field and help enhance our solution for preventive maintenance
Assist in the design and development of electronic circuits.
Conduct full simulation coverage of our circuits to ensure functionality and performance.
Collaborate with senior engineers to analyse and improve circuit designs.
Prepare and maintain documentation related to circuit designs and simulation results.
Stay updated with industry trends and advancements in circuit design and technology.
Support other engineering teams as needed.

Requirements:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.
Preferred Minimum Qualifications:
* 2-7 years of significant logic design engineering experience.
* Knowledge in digital design domain, preferably from the field of ASIC design front end activities.

* Hands on experience in micro-architecture definition from specification, RTL development and debug.

Preferred Qualifications:
* Experience in RTL implementation in image processing domain (pixel processing, filters, convolution)

* Experience in scalable design implementation (definition and coding)

* Experience in digital design tools for the following flows: simulation, dynamic verification, synthesis, linting, timing analysis and formal verification.
* Ability to work in a team.
* Ability to understand system wise aspects like interaction of HW with SW and FW

Requirements:
Ensure the proper implementation of the SDLC process according to IEC 62304, the quality of the documentation (review and approval ) in the project, that is compliance with the regulatory requirements
Support SW production/release documentation and ECO
Provide Quality support at various stages of Product Development and coaches others in analysis and decision making
Ensuring that R&D procedures and work instructions are continuously up-to-date and effective
Lead Risk Management processes according to ISO 14971
Provides the quality/independent review at defined design reviews and project design plans, for new development projects as well as design/process changes
Support the implementation of eQMS systems and quality tools used in the development process, including documentation, testing, and monitoring of the product
Keeps up to date on all ISO/FDA/MDR and other Product Development related regulatory requirements and relays this information to the Product Development group
Qualifications:
Bachelors degree in Engineering or related field, such as Engineering, Computer science, etc
5 years of related experience in the medical device, experience with the development of Multidisciplinary products or SaMD
Expert understanding of appropriate global medical device regulations, requirements, and standards, including Quality Management System ISO 13485/ QSR / MDR, SDLC IEC 62304, and Risk Management ISO 14971
Familiar with cybersecurity and privacy standards and regulations, such as ISO 27001:2013 an advantage
At least 5 years of experience as a QMS Specialist/Manager
Certified Quality Engineer (CQE / CQM) an advantage
Certified Internal Auditor an advantage
Project Management (development of project plans, status meetings, project reporting, etc) and organizational change movement
Ability to communicate perfectly in English both orally and in writing
Self-motivated and able to manage time working on multiple projects simultaneously
Tech Savvy Demonstrated competency in computer skills
Must be able to communicate appropriately and adequately to all management levels