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We are looking for an experienced hands-on Python Engineer who can work independently with remote teams (SW, HW, logic,) and create products that will shape the future of Quantum Computers.
The Quantum Computing SDK is the interface through which our customers run our control system. Customers use it to configure their cutting-edge system and run their ground-breaking experiments. Various institutions from world-class universities to hyper-scalers use the SDK to calibrate their delicate QBits, perform Write and Read Quantum Computing Operations and run programs in higher level Quantum Computing languages like OpenQASM3.
Responsibilities:
Develop the software for the company's Quantum Computing SDK.
Take part in all the technical aspects of the SW development from design to delivery.
Work with high standards of SW methodology, clean-code and CI.

We are seeking a skilled software engineer to join our NPU software stack development team. This role involves developing high-performance GPU programming frameworks, runtime systems, and libraries for AI/ML workloads. You will be responsible for implementing, optimizing, and maintaining GPU software stack components to support distributed AI training and inference.
Key Responsibilities:
Identify bottlenecks, analysis and optimize in distributed NPU eco-system
Design and develop NPU memory management system
Design and develop optimized NPU development framework, execution path and debugging
Develop compatibility with AI frameworks (Triton, PyTorch, JAX)
Write high-quality, well-tested code with comprehensive documentation
Collaborate with other teams (Hardware, Network, QA, AI Framework Integration)
Participate in code reviews and technical design discussions

Required Micro-Architect
Description
A global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of the company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
Join our cutting-edge hardware development team as Micro-Architect and play a key role in defining and implementing the micro-architecture of advanced digital logic components.
What You'll Do:
Define and develop micro-architecture for complex logic blocks - from concept through high-quality RTL implementation
Collaborate closely with architecture, verification, design and software design teams
Write clear and detailed design specifications and drive architectural trade-off analysis
Optimize for performance and area
Contribute to innovation, methodology improvements, and technical leadership within the team.

We are looking for an excellent design engineer to join our team and build our state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)
Learning system and SW requirements for proper implementation of HW-SW interface.

We are seeking an experienced HW Team Leader to drive the engineering efforts behind our electronic systems. This role will focus on enhancing the testability, production efficiency, and quality of our products by defining Design for Testability (DFT) strategies, developing production test solutions, and leading failures investigation and correction.
What You'll Do:
Lead and mentor a team of highly skilled hardware engineers.
Drive execution in a fast-paced, multi-project environment.
Own and evolve our Design for Testability (DFT) strategy and guidelines.
Lead end-to-end development of production test solutions and test facilities.
Drive root-cause investigations, failure analysis, and product improvement initiatives.
Collaborate closely with R&D, manufacturing, and quality teams to ensure product reliability and production readiness.

We are looking for an experienced Front-End Team Leader to lead the design and development of the companys user-facing software systems. This is a unique opportunity to combine hands-on technical leadership with people leadership, working closely with product, UX, and backend teams to build sophisticated, high-impact user interfaces for cutting-edge quantum computing platforms.
Join us in this exciting journey to redefine the future of quantum computing.
Responsibilities:
Lead and mentor a global team of front-end engineers, fostering technical excellence and growth.
Own the front-end architecture and technical vision of complex web applications.
Design and implement scalable, high-performance, and maintainable UI solutions.
Collaborate closely with backend, product, UX, and system engineers to deliver end-to-end features which are perfectly adapted to the needs of the Quantum Computing audience.
Drive best practices in code quality, testing, performance, and accessibility.
Take part in hands-on development alongside the team.
Lead design reviews, code reviews, and technical decision-making.
Execute in a fast-paced, evolving environment with high technical complexity.

We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the Platform team.
This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems.
Responsibilities:
Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.

we are looking for a Senior AI Engineer.
Responsibilities:
- Design and develop LLM-powered security features and internal AI tools, including RAG pipelines, multi-agent workflows, and prompt-engineered systems for cybersecurity use cases
- Architect and operate multi-agent systems in production - covering orchestration, inter-agent communication, task delegation, and failure handling at scale
- Build agent monitoring and observability pipelines, including tracing, drift and failure detection, alerting, and reliability SLA management
- Build and maintain scalable MLOps infrastructure - model serving, evaluation frameworks, experiment tracking, and CI/CD for ML
- Fine-tune and adapt foundation models on internal datasets such as network telemetry, security logs, and threat intelligence
- Establish and champion best practices for model observability, safety, and responsible AI deployment
- Stay current with the LLM/GenAI ecosystem and drive continuous improvements to the AI SDLC and AI Research cycle

We are establishing a new backend group that will take full ownership of a core application area.
We are looking for a Senior Backend Developer who will lead the backend effort end-to-end - from initial architecture and technology choices, through implementation and scaling, and into long-term ownership and evolution.
This is a hands-on technical leadership role. You will design, build, and own production systems, work closely with multiple teams, influence product direction, and set the technical bar for the group.
We embrace an agile mindset - you should be comfortable with context switching, handling multiple priorities, and adapting quickly to changing requirements.
Responsibilities:
Take full ownership of the backend architecture for a major application area
Design and implement scalable, reliable, and maintainable backend systems
Lead technical design and decision-making, including technology and architecture choices
Work closely with product, frontend, platform, and other backend teams
Participate in product vision discussions, brainstorming, and planning sessions
Translate product requirements into robust technical solutions
Write high-quality, production-grade code
Drive debugging and root-cause analysis of complex production issues
Ensure best practices in performance, reliability, security, and observability
Mentor and technically guide other backend engineers as the group grows

We are looking for a highly experienced a hands-on Compiler Engineer who embodies ambition and positivity.
Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
Responsibilities:
Develop our compiler from a proprietary quantum language to a proprietary processor tailored to realize and accelerate quantum computing.
Take on complex optimization challenges at the core of our unique compiler, focusing on real-time applications, hybrid quantum/classical algorithms, and parallel processing.
Conduct rigorous testing, debugging, and profiling to ensure the performance and correctness of compiler outputs.
Hands-on development and debugging of software to optimize the utilization of limited hardware resources, enabling the scaling of quantum computing systems and improving quantum algorithm performance on our cutting-edge quantum orchestration platform.
Collaborate closely with hardware, software and architecture teams to ensure seamless software-hardware integration, directly enhancing system capabilities and performance.

We're looking for a hands-on Tech Lead to drive the technical direction of our core backend layer and lead the engineers building it. The systems you'll own handle bursty, high-throughput workloads: thousands of requests per second, strict latency requirements, distributed coordination, hard concurrency problems. You'll shape the architecture, review the designs, and still write the code.
What Makes This Role Different
Our backend team is the orchestration layer between:
Hardware control systems (C++)
Client-exposed SDK (Python)
Reporting and management system (Go)
Business logic (Java/Kotlin + Spring)
As Tech Lead, you're the technical anchor of that layer. When teams disagree on where a boundary belongs, you drive the decision. When a design has a flaw nobody's spotted, you catch it. When the hardest problem lands, you're close enough to the code to pick it up yourself.

We are looking for an Assistant Controller to join our Finance team. The ideal candidate is detail-oriented, proactive, and enjoys working in a fast-paced, global environment while taking ownership of key financial processes.
Responsibilities:
Monitor and support the day-to-day financial operations of the company.
Take an active role in the monthly, quarterly, and annual closing processes, ensuring timely and accurate financial reporting.
Prepare and review month-end close activities, including balance sheet reconciliations, accrual calculations, journal entries, and financial performance analysis.
Support corporate tax compliance processes, including the preparation and coordination of tax filings across multiple entities.
Oversee cash management activities and support the companys liquidity planning.
Review and approve vendor payments and payroll processes across multiple entities, ensuring compliance with internal controls and company policies.
Manage the company's global grant programs, including compliance, reporting, and ongoing administration across multiple entities.
Collaborate closely with external auditors and service providers during month end close and annual audits.
Drive process improvements and contribute to the development of scalable financial controls and procedures.

We are looking for a highly experienced Senior Mechanical to join our Ethernet Product Hardware Engineering team. The team is responsible for the development of next-generation networking and routing platforms, from board-level design through complete rack-level system integration.
As a Senior Mechanical, you will be responsible for the mechanical and thermal design of complex communication systems deployed within telecom and datacenter racks. You will work closely with Hardware, PCB, System, Manufacturing, and Reliability teams to ensure optimal thermal performance, mechanical robustness, serviceability, and manufacturability throughout the product lifecycle.

We are looking for a highly experienced Senior Mechanical to join our Ethernet Product Hardware Engineering team. The team is responsible for the development of next-generation networking and routing platforms, from board-level design through complete rack-level system integration.
As a Senior Mechanical, you will be responsible for the mechanical and thermal design of complex communication systems deployed within telecom and datacenter racks. You will work closely with Hardware, PCB, System, Manufacturing, and Reliability teams to ensure optimal thermal performance, mechanical robustness, serviceability, and manufacturability throughout the product lifecycle.

we are seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team. In this role, you will be responsible for defining, analyzing, simulating, and validating power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs, advanced SerDes interfaces, optical modules, and AI-scale networking systems.
You will work closely with hardware architects, PCB designers, ASIC teams, signal integrity engineers, mechanical engineers, and manufacturing partners to ensure robust power delivery, optimal system performance, and successful product deployment.
Responsibilities:
Lead Power Integrity (PI) activities throughout the hardware development lifecycle, from architecture through production.
Define and optimize board-level and package-level Power Delivery Networks (PDNs) for high-current networking ASICs and supporting devices.
Perform pre-layout and post-layout PI simulations using industry-standard tools.
Establish target impedance requirements and validate compliance across all power rails.
Analyze DC voltage drop, AC impedance, transient response, and power distribution performance.
Collaborate with PCB layout engineers to optimize stackups, plane structures, decoupling strategies, and power routing.
Work closely with Signal Integrity engineers to ensure SI/PI co-optimization of high-speed interfaces.
Develop power integrity design guidelines and best practices for next-generation networking products.
Support schematic reviews, layout reviews, and design sign-off activities.
Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, current probes, and related equipment.
Investigate and resolve PI-related issues during board bring-up, validation, and production.
Collaborate with ASIC, FPGA, memory, optics, and power component vendors to optimize overall system performance.
Drive continuous improvement of PI methodologies, simulation flows, and validation processes.