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We are seeking a dedicated and skilled team member to assist customers with integrating DDR/HBM PHY and/or Controller Intellectual Property.


Responsibilities:
In the Applications Engineering team, your main role will be to assist customers with integrating advanced DDR Interfaces into their System On a Chip. These systems are next generation products utilizing Synopsys DDR5/4, LPDDR5x/5/4x or HBM3 IP.
The job gives you a chance to work with Synopsys IP and the newest industry specifications and applications.

The Application Engineer provides:

Provide technical support and guidance to Synopsys customers during their System on Chip (SoC) workflow to address and overcome any technical difficulties.
performs integration reviews at key milestones.
accompany customer's silicon/system bring-up preparation and execution.

Key Qualifications:
BSEE or equivalent background required, MSEE preferred.
Requires 8 years of related design or customer experience.
Experience in one or more steps on IP design or integration flow of System On a Chip design:Simulation, verification, RTL synthesis, physical design, timing closure, and silicon bring-up/characterization tasks within a system environment.

we are looking for an experienced HW / SW system engineer for the Nitro cards product team .
Our products include the most advanced interfaces and technologies and widely used across AWS data centers as backbone for Nitro and other services. The candidate will serve as first line of operational health and support for Annapurna Labs' Nitro cards in AWS data centers.
Key job responsibilities:
- Lead triage, debug and root cause analysis of systems in AWS data centers
- Enhancing the ability to trouble shot issues and driving for closure of in-fleet problems
- Analyze customers` mode of work / requirements and provide resolutions accordingly
- Co-work with Annapurna Labs monitoring team and other root cause teams to improve quality and reliability of products operation in the fleet
- Provide Annapurna Labs ASIC design, SW development, QA and architecture teams information and requirements from customers fleet operation perspectives and represent the customer voice
- Drive and maintain trainings, quality documentation and collateral in order to improve in-fleet operation
- Design and define various tools and scripts to provide support to projects and customize it as per requirement.
- Willing to travel per need few times a year

We are looking for a talented Operations Shift Manager for our test laboratory, to support the development of a semiconductor platform based on revolutionary architecture.
Key job responsibilities:
Work in a shift pattern, morning, noon, and night, according to requirements.
Set up complex operational machinery.
Operate machinery and make adjustments to enhance performance.
Operate equipment according to a specific process.
Troubleshoot management and debug session ownership.
Support the testing and automation of silicon products.
Perform routine lab equipment maintenance.
Perform quality control based on performance reports, recording procedures, and documentation.
Manage inventory, including stocktaking.

Were searching for sharp engineers to lead cutting edge products, re:inventing super computers and deploy our new SRD (Scalable Reliable Datagram) network protocol into the largest public cloud on the planet! starting from the identification and definition of project requirement, defining SW and HW interfaces, feature development and deployment, to operation support on a very large scale.

we are looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.
Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.
Key job responsibilities:
Identifying and resolving design issues and debugging problems that may arise during the design process.
Broad influence inside and outside the team, playing a major role in leading the group and helping it grow.
Owning a domain in an SoC Fully responsible for its entire life cycle:
o High system view, based on major Architecture and Micro-architecture activities.
o Writing Register Transfer Level (RTL) code in hardware description languages such as Verilog or VHDL.
o Supporting the Verification and Emulation teams: Test plan, debug and review results.
o Ensuring that the final chip meets quality and reliability standards.
Collaborating with cross-functional teams, including Product Definition, Verification, Emulation, Software, and Silicon Integration.

we are looking for talented engineers to join the Pre-silicon Verification team and help us technically lead the challenges of the next decade, developing a semiconductor platform based on revolutionary architecture, and taking part in the development of cutting-edge products within a disruptive system architecture.
Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment.
We are open to hiring candidates to work out of one of the following locations:
Haifa, ISR

we are looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.
Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.
Key job responsibilities:
Identifying and resolving design issues and debugging problems that may arise during the design process.
Owning an SoC domain or sub-domain Fully responsible for its entire life cycle:
o Architecture and Micro-architecture
o Writing Register Transfer Level (RTL) code in hardware description languages such as Verilog or VHDL.
o Supporting the Verification and Emulation teams: Test plan, debug, and review results.
o Ensuring that the final chip meets quality and reliability standards.
Collaborating with cross-functional teams, including Product Definition, Verification, Emulation, Software, and Silicon Integration.

We are looking for the best Physical Design Application Engineer to join the ride as we spearhead the next revolution in electronics!
Responsibilities:
Developing Back End flow using Cadence and Synopsys tools
Implementation of ASIC units using advanced flows
Provide support to customers in implementation company IP's & resolve any challenges
Provide continuous feedback to R&D to improve the product