We are looking for highly motivated, and passionate, Verification engineer to join our FPGA Team , for our next generation base-station products.
What you'll do:
Take part in FPGA Verification/Simulation activities.
Build & maintain new environments forFPGAs using UVM methodology.
Bring-your-own innovation into our team.
Requirements: Excellent knowledge with Verilog & system Verilog A Must
Experience of 5+ years in verification using UVM methodology A Must
An independent problem solver with excellent verification and analytical skills.
Excellent communication skills, team worker and ability to thrive in a global multi-site environment.
Nice to have:
Good knowledge of scripting languages such as: Python/Perl/Bash/TCL
Experience in 3GPP features/Wireless communication (PHY aspects)
Experience/Knowledge with FPGA design
Good working knowledge with simulation like , Xcelium , ModelSim, QuestaSim
Education:
B.Sc in Electrical/Computer Engineering
This position is open to all candidates.
