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we are seeking a talented TEST Development Engineer to join our team. In this role, you will develop automated TEST equipment (ATE) systems, including both digital and RF testing. You will take part in the entire development process, from defining requirements to delivering the final TEST solution to the customer and maintaining it. Responsibilities:
* Develop ATE systems for digital and RF testing.
* Manage the full TEST development lifecycle, from requirement definition to customer delivery and ongoing maintenance.
* Collaborate with multidisciplinary teams to ensure seamless integration of hardware, software, RF, and digital components.
* Work with various communication protocols, such as TCP, UDP, and SPI.
* Manage subcontractors and oversee outsourced tasks.
* Design and develop auxiliary circuits/RTM for testing purposes.

Join the Silicon One PHY System Team, a key part of our silicon development. You'll be at the forefront of defining, implementing, and validating advanced PHY and system solutions for next-generation network devices.

Your responsibilities will include:

Defining features for future devices utilizing cutting-edge silicon technologies.
Developing and optimizing PHY firmware and calibration processes.
Driving system-level definitions, operations, and post-silicon validation.
Collaborating with cross-functional teams to ensure high-quality deliverables.

You'll work within our Silicon One, our ASIC design group, contributing to revolutionary network devices.

Operate in a dynamic startup-like atmosphere within a stable and leading corporation.
Collaborate in a design center housing all silicon hardware and software development disciplines under one roof.
Be part of a team transforming the industry with a unified, programmable silicon architecture designed for 5G networks and beyond.

?Your Vision, Our Mission: Join Our Team as a Computer Vision Engineer?
?? Beer Yaakov
Key Responsibilities: - Verification of computer vision and image processing systems to ensure alignment with requirements. - Leading system performance analysis through tool development, usage, and results presentation in decoding reviews. - Identifying issues, documenting them, tracking progress, and ensuring resolution. - Conducting performance research and analyses to support algorithm development.

You will join our Silicon One team, the epicenter of our ASIC design.
Our engineers handle every aspect of chip design, from definition and architecture to coding, physical design, and signoff.

Your responsibilities will include:
Spearhead innovative switch system design, guiding the process from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.

You'll join our Cisco Silicon One architecture team, central to silicon development at Cisco.

You will define features of future devices using the latest silicon technologies, focusing on Logic Design and coding.

You will be responsible for defining the device specification.


Who You'll Work With:

Join Ciscos Silicon One team within Ciscos ASIC group. Contribute to next-generation networking devices - Cisco Silicon One.

Work in a startup atmosphere within a stable corporation.
Collaborate in a design center hosting all silicon HW and SW development disciplines on one site.
Transform the industry with AI networks, providing a unified, programmable silicon architecture for Cisco's future products.

Youll be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon development.

Our team deals with PHY and system aspects of the device: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the Automation Infrastructure and tools.

We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

You'll be part of our Group driving our game changing next generation network devices. Our unique team works in a startup atmosphere inside a stable and leading corporation.

Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.

We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.

Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.

Our Silicon One is a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!

You'll be joining our Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

You'll be part of the Cisco Silicon One team, which is at the heart of Ciscos software and ASIC design efforts.

As part of our team, youll contribute to the development of our next-generation network devicesCisco Silicon One. Our team operates in a startup-like environment within a stable and leading corporation.

This is an onsite role and will require working out of the Milpitas/San Jose office location.

In this role, you will be responsible for our SiliconOne Switch ASIC Post-Silicon Electrical Validation. You will deal with all chip validation aspects: Building validation plan, Coding the validation SW environment using Python and device SDK, test execution and results analysis. You will gain detailed knowledge of chip architecture, functionality and operation modes allowing you to debug and tackle Electrical chip related problems.
Travel abroad for 2-4 weeks a year.

You'll be joining our Hardware architecture team at Silicon One, focusing on advanced modeling and simulation using SystemC.
In this role, you'll contribute to the development of complex infrastructure of SystemC behavioral models.
Your work will enable the infrastructure to support the entire chip design process, enhancing simulation accuracy, performance, and cross-functional collaboration.

Youll be part of our team driving our Silicon Ones next-generation network devices, working in a dynamic environment that combines startup agility with our corporate stability.

Come join us and help shape our groundbreaking solutions by designing, developing, and testing some of the most complex ASICs in the industry.

What You Will Do
In this role, you will be part of the Silicon One Switch ASIC Post-Silicon Electrical Validation (EPSV) team.

Ensure the ASIC operates according to specifications and reliably over time by performing extensive, high-precision measurements using advanced test equipment and procedures.
Conduct deep-dive investigations, integrating knowledge across hardware, software, and system domains to identify root causes of observed device behavior.
Handle all chip validation aspects, including:
Building validation plans.
Performing EPSV using advanced test and measurement equipment.
Writing tests in Python over device SDK.
Executing tests and analyzing results.
You will gain in-depth knowledge of chip architecture, functionality, and operating modes, enabling you to debug and resolve electrical chip-related issues.

The Package Design Team at Silicon One is at the center of our silicon development, creating revolutionary solutions for next-generation networking.

Our engineers lead the entire package design process, working closely with layout editors to implement designs for high-speed signals, power distribution networks (PDN), and all functional interfaces.

What You Will Do:

As a member of the Package Design Team, you will:
Lead package design tasks, overseeing planning, coordinating with stakeholders, and driving schedules from start to finish.
Optimize package pinouts, stack-ups, placements, power distribution, and high-speed routing while balancing functional needs, manufacturing constraints, and performance considerations.
Collaborate with silicon floor plan, signal integrity (SI), and power integrity (PI) teams to ensure design quality and efficiency.
Work closely with layout editors to implement the package design, ensuring alignment with high-speed signal and functional interface requirements.
Enhance design methodologies and procedures, collaborating with vendors and developers to improve product quality and design efficiency.

Youll be part of the Silicon One team, our hub for groundbreaking ASIC design, driving innovations for the 5G era and beyond.

Based in Caesarea, Israel, our team fosters a startup-like atmosphere within the stability of a global technology leader. Our design center hosts all silicon hardware and software development disciplines under one roof, offering unique opportunities for collaboration and innovation.

Youll work with cross-functional teams, including Board Design, Software, Signal and Power Integrity, Packaging, and Production, to deliver groundbreaking solutions for the networking industry.