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Required Wafer-Scale System: Computation (LLM) and Communication (NoC) Co-Design
In this job opening, we are seeking a highly motivated and visionary researcher to join our team focused on chiplet-based computing systems. This role involves research and development in chiplet-based architectures, aiming to overcome performance and scalability limits of traditional compute platforms.
Responsibilities:
Conduct cutting-edge research on the co-design of communication and computation for wafer-scale systems. On the communication side, the work focuses on architecting Networks-on-Chip, providing scalable, high-bandwidth, and ultra-low-latency interconnects that efficiently span multiple dies and support fine-grained data movement. On the computation side, the research emphasizes optimizing and mapping training and inference workloads to fully exploit wafer-scale resources, improving performance, scalability, and energy efficiency through intelligent task placement and scheduling.
Investigate various aspects of system design, including:
Network-on-Chip design, further including Topology exploration, routing algorithms, and protocol/flow-control design to support high-throughput collective communication, low-latency synchronization, and efficient model/data parallelism
Expressing and Mapping LLM Parallelism to Wafer-Scale System that simplify LLM parallelism (e.g., tensor, pipeline, and data parallelism) and efficiently map training and inference workloads onto wafer-scale system.

In this student role you will work within a segment of our Engineering team responsible for various fields, focusing on hardware. We are recruiting will work together with you and lines of business in order to find the best possible match for both sides!

ELECTRICAL ENGINEERING STUDENT (RF AND COMMUNICATION SYSTEMS)
Operating complex technological systems in operational activities
Managing the technological operation in operational activities
Operating and maintaining technological systems in the SIGINT field
Testing, installing, training, implementing, and maintaining the aforementioned systems
Accompanying cellular projects and managing the operational aspect of the project
Planning and conducting experiments with technological systems in the SIGINT field.

Were searching for sharp engineers to lead cutting edge products, re:inventing super computers and deploy our new EFA (Elastic Fabric Adapter) network protocol into the largest public cloud on the planet! starting from the identification and definition of project requirement, defining SW and HW interfaces, feature development and deployment, to operation support on a very large scale.

Were searching for a Lab Technion Student who will be responsible for the installation, configuration, maintenance, and troubleshooting of our Linux-based server infrastructure, as well as managing various network services and components.

Student will have at least 4 semesters remaining in their degree. The ideal candidate will posses a strong passion for learning new things and the ability to quickly put that new knowledge and skills into practice. You will have the ability to perform basic troubleshooting for hardware, software, and networking issues without guidance.

Were searching for sharp engineers to lead cutting edge products, re:inventing super computers and deploy our new SRD (Scalable Reliable Datagram) network protocol into the largest public cloud on the planet! starting from the identification and definition of project requirement, defining SW and HW interfaces, feature development and deployment, to operation support on a very large scale.

As HW Validation student in the Nitro team you will be responsible to validate the hardware of our network interface card (Smart NIC).
Youll provide leadership in the HW interfaces of new technologies to large scale deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and youll work with thought-leaders in multiple technology areas.

Key job responsibilities
- Own hardware validation activities for our products, from test execution through analysis and debug.
- Analyze validation and production data to identify issues, trends, and opportunities for improvement.
- Collaborate with HW, SW, and validation teams to enable efficient testing, debug, and issue resolution.
- Develop and execute validation and performance tests, considering both technical requirements and customer needs.
- Support the validation and deployment of new hardware technologies at scale.

looking for talented students to help us develop the semiconductor platform which is based on revolutionary architecture.
Take part in the development of innovative products within disruptive system architecture. Youll have the opportunity to work on the technologies that power the worlds largest Cloud provider, within a dynamic, open, and fast-paced environment. Our Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world.

Key job responsibilities
As Post Silicon Dev Student you will be exposed and learn wide range of expertise such as: C++ programing, hardware design, data mining, Verilog simulations, working with various high end test equipment and more
If paving new roads on edge of technology within a strong and dynamic team is what you seek, your place is with us.

As we expand our presence in Israel, we are seeking a motivated Physical Design Student to join our founding local engineering team.

This is a unique opportunity to kickstart your career in the semiconductor industry. Working alongside senior industry veterans, you will gain hands-on experience in backend execution and advanced methodologies for cutting-edge chips that power the world's largest AI clusters. If you are passionate about silicon hardware, eager to learn, and thrive on solving complex engineering challenges, this role offers the perfect bridge between your academic studies and a high-impact career.


Key Responsibilities

Guided Implementation & Learning
Partner with and learn from senior engineers to support the physical implementation journey, including synthesis, floorplanning, Place & Route (P&R), and Clock-Tree Synthesis (CTS).
Assist in macro-level implementation and develop hands-on skills in complex layout routing.
Participate in deep-submicron process challenges under close professional mentorship.

Signoff & Design Integrity Support
Assist in running engineering checks for design integrity, including Static Timing Analysis (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR).
Learn to apply Logic Equivalence Checking (LEC) to help guarantee design correctness.
Gain exposure to the rigorous flows required to ensure first-pass silicon success.

Scripting & Cross-Functional Collaboration
Leverage and develop scripting tools to automate repetitive tasks and optimize the engineering environment.
Collaborate with Architecture, Design, and DFT teams to understand how different chip design disciplines intersect.
Actively participate in team reviews and technical discussions to ramp up backend methodologies.

Were looking for a V&V Student to help verify that products meet all system requirements and conform to Spec, and to validate and assure a quality competitive product that fits and satisfies the customers needs.

Reports to: Lab Manager

Location: Afek Industrial Park, Rosh Haayin



What will you do?

Execute tests on different levels (Component, Assembly, Sub-system integration, System level testing)
Perform results analysis and present them to the test owner
Perform Integration work on machines, simulation tools and jigs
Monitor and measure machine KPIs while operating the machines
Provide Feedback & troubleshoot system problems, fault recovery and accurate data transfer to the Development Department
Performs preventive maintenance routines
Take parts in upgrading R&D machines to the latest technologies