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Required System Architect
About the Business Unit:
We are at the forefront of the Smart Edge revolution, with innovative state-of-the-art Silicon and Software solutions that enable products to Connect, Sense and Infer. Within the Wireless Internet of Things Business Unit (WIoT BU), we are offering you a unique opportunity to shape the future of connected devices. Our advanced wireless technologies, including Bluetooth, Wi-Fi UWB, and 5G Cellular IoT, are integrated into over a Billion devices annually.
About the role:
In this role you will work on the most advanced wireless communication solutions as part of an agile team focusing on the latest communication standards. You will define architecture for future products and optimized algorithms for hardware implementation.
Responsibilities:
Research and investigation of the advanced communication standards. Definition of PHY System specifications and future architecture. Working closely with the functional teams (Algorithm, HW/SW, Validation, etc.) on the implementation from early algorithm study to HW/SW design and lab integration. Support customers engagement and product design on related issues.

Required Senior Hardware Architect for Mobile broadband
About the role:
As a senior architect you will be a leader, someone who brings into the company new ideas and helps drive our next generation wireless products
Responsibilities:
Be a leader in the Mobile Broadband team, architecting state-of-the-art modems for our next generation cellular solutions. Investigate, invent, develop, innovate wireless modem components. Drive the implementation phase with the VLSI, Software and Algorithm teams.

Required System Architect
About this position
In this position, you will oversee system definition and ownership for one of our product lines. You will be in charge of defining system solutions conforming to product, marketing, and customer requirements, with a detailed definition reaching non-functional KPIs. You will closely collaborate with R&D and Business groups to make technical decisions that balance product requirements, timelines, and the complexity of solutions.
Responsibilities
Work with stakeholders to understand their requirements.
Specify system, SW, and HW requirements and architectural features at system and SoC levels while conforming to product requirements.
Define pre and post-silicon data flows and control flows combining HW and SW.
Uncover and resolve design weak spots.
Lead cross-functional system level features and debug system-level bugs.
Write internal and external specifications and technical documentation.

Required SoC Architect
About this position
In this position, you will write SoC, system, and sub-systems specifications and requirements for our future chips. You will collaborate with Product, SW, and VLSI to explore optimal architectural solutions balancing product and market requirements, HW and SW effort, and non-functional KPIs. You will be tasked to analyze different architectural concepts and own different KPIs of our SoC and its subsystems.
Responsibilities
Work with stakeholders to understand their requirements.
Specify system, SW, and HW requirements and architectural features at SoC level, our IP and 3rd party IPs integration while conforming to product requirements.
Define pre-silicon data flows, control flows and features combining HW and SW and balancing effort and nonfunctional KPIs.
Evaluate the SoC, sub-systems, and our IP performance, and analyze and suggest optimal balancing performance, power, cost and effort.
Evaluate and select third-party IPs for our future SoCs.

We are seeking a highly skilled Cross-Portfolio Architect (CPA) to join our team.
The CPA will play a crucial role in aligning and unifying architectural concepts across our portfolio of products and working with Sales to define blueprints for customer solutions.
This position requires deep familiarity with diverse SW and HW products and their architecture.
As an employee you will:
Architectural Alignment and Unification:
Collaborate with Cognytes multiple product house architects to align and unify architectural concepts.
Identifying similar components, modules and capabilities and suggesting ways to streamline the development, deployment and use of these.
UX Principles and guidelines, including naming conventions
Aligned APIs, including creating a common Query Language
Microservices and detachable/sharable analytical capabilities
Media enrichment platform, including callback capabilities
Public cloud, Kubernetes on-prem, etc.
Microservices and detachable/sharable analytical capabilities
Media enrichment platform, including callback capabilities
Public cloud, Kubernetes on-prem, etc.
Outbound Solution Architecture for Sales:
Work with Sales in a Solution Architect capacity to define blueprints for customer requests.
Develop packaged solutions that integrate multiple products (Cognyte and third-party).
Ensure solutions are functional, architecturally solid, and reproducible.

Participate in evaluation of future ASIC designs and general architecture for executing Googles data center networking roadmap, off-the-shelf components, vendor co-developments, custom designs, and chiplets.
Collaborate to develop new layer protocols for data center networking.
Understand how everything interacts with software and other ASIC subsystems to implement data center networks.
Define performance hardware/software interfaces. Write micro-architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.

We are seeking a highly motivated Chip Design Architect to join our team of experts and help shape the future of high-performance computing. Our next-generation Infiniband and NVL switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used in industries such as finance and research labs. As a Chip Design Architect at our company, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation of switches that will be used by top researchers and engineers around the world. The products you'll develop will be integrated in many leading-edge compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.

What you will be doing:

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and hardware teams, to ensure the successful execution of the project.

Define the HW boot, clock and Reset architecture for Switch ASIC.

Develop slow-speed interface architecture specifications and design guidelines, conduct trade-off analysis for different architecture options, and oversee the implementation of the chosen architecture by the chip design / FW / SW teams.