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We are looking for an experienced Firmware Manager to join the NIC Firmware team at the Yokneam site. You will take part in leading a development team in our Firmware group while taking part hands-on with development activities. The Firmware team develops cutting edge networking features for enabling the AI revolution, cloud, HPC and storage. We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced.

What you will be doing:

Lead a group of engineers and provide technical guidance and career mentorship to the team. Empower the team members to excel and increase team productiveness.

Work closely with the architecture and different software design teams.

Implement new features in the core of our NIC firmware in pre and post silicon environment.

Develop verification tests for advanced features in a highly complex and sophisticated Firmware testing environment.

Gain a deep understanding of system debug, networking technology and stacks, as well as the HW/FW/SW relationship.

You will learn how a big software project is operated, maintained, qualified and released, and how Hardware and Firmware are developed.

The Networking Advanced Development Software team develops new groundbreaking technologies to enable new market shares for the company and tighten customer relationships. These are emerging technologies in networking and distributed computing for the booming AI factories and data centers. They span areas such as AI neural networks, Deep Learning, High Performance Computing (HPC), Storage, Cloud, SW Defined Network, Network Function Virtualization, 5G NR and more. We develop the solutions top-down, all the way from application behavioral analysis, to architecture definition and down to the implementation, using the world-leading our devices. The development traverses any needed component - application SW, middleware SW, OS kernel subsystems, device drivers, embedded SW (Firmware) and CUDA GPU. We collaborate with partners and key customers in the analysis processes and engage with open source communities introducing our leading features.

What youll be doing:

Lead a team of 5 engineers in the advanced technologies development.

Design and implement solutions throughout all layers from high level application, OS and driver subsystem to firmware.

Work on impactful projects involving state-of-the-art high-performance computing hardware and software.

Provide insight and technical guidance and collaborate with peers from across the company - including software architecture, chip architecture, and engineering departments to improve our future technology.

Collaborate with our partners and customers.

We are looking for an excellent, creative, and independent IC Test Validation & Automation Engineer to join our Networking unit. Our Networking has continuously reinvented itself over the years, delivering industry-leading high-speed Ethernet and InfiniBand solutions that push performance, bandwidth, and reliability from one generation to the next. In this role, you will help transfer our Network Silicon IC products, including Switch, NIC, and SmartNIC devices, from design engineering to high-quality mass production. You will define and automate IC test validation methodologies, develop validation tests and automation infrastructure, and build scalable flows for regression execution, results collection, reporting, and debug.

You will work closely with HW, SW, FW, SPE, SLT, DFT, security, and production teams, and will be responsible for improving test stability, coverage, quality, and debug visibility across wafer-level and final-test environments. The role includes troubleshooting complex test issues, improving validation methodologies, integrating tools such as Jenkins, Git, Jira, and automation agents, and acting as a gatekeeper for IC test program quality before production release. If you are passionate about IC product testing, automation, and enabling the highest-quality Networking products, we would like to hear from you.

What you'll be doing:

Definition and automation of IC test validation methodologies and procedures.

Developing validation tests and automation infrastructure.

Building Jenkins-based flows for regression execution, result collection, and reporting.

Using Git-based development workflows for test infrastructure, reviews, and releases.

Integrating Jira and MCP-based tools into validation, debug, and issue-tracking flows.

Maintaining products quality by improving test stability, coverage, quality, and debug visibility.

Troubleshooting test issues and improving automated testing methodologies.

We are seeking a hands-on, results-focused Manufacturing & Production Security Specialist to join our ITPE (Interconnect Product Engineering) organization. You will own and drive cybersecurity standards across production environments and testing lifecycles, spanning networking product lines manufactured at internal and contract manufacturing sites. We develop a collaborative and inclusive work environment, where ideas are shared and innovation is encouraged.

As the ITPE Security Specialist, you will collaborate with Infrastructure Architects and Test Engineering Developers to design, build, and implement a highly secure PKI environment and robust data paths. This role combines deep technical security implementation with governance spanning on-site and outsourced manufacturing locations, ensuring strict security compliance while enabling engineering velocity.

What youll be doing:
Implement, automate, and maintain a robust and secure PKI infrastructure; build secure Key Provisioning and Code Signing workflows within ATE pipelines.
Own lifecycle management of digital certificates and cryptographic identities across all product families (LinkX, switches, NICs).
Partner with test developers to harden the Test Engineer Datapath, preventing data tampering or leakage.
Implement security baselines, endpoint protection, and AD Privilege Management across test stations and MES systems.
Define, enforce, and audit security policies across all internal and external production sites (Contract Manufacturers).
Implement network segmentation between corporate IT, engineering networks, and the manufacturing floor.
Own recurring security syncs and present security status updates to ITPE leadership.

Our IC Product Engineering are looking for a senior engineer to join us and lead the way we develop characterization and validation methodologies for our next-generation silicon! This role puts you at the center of our hands-on validation work while shaping how we approach characterization at scale for the programs ahead.

What youll be doing:

Define and develop characterization and validation techniques for post-silicon bring up and production test, spanning electrical, functional, and performance characterization. Working in close coordination with test engineering, yield, NPI, FW and other teams, lead methodology planning for future products and serve as the synchronization point between our Israel and US-based teams.

Day to day, this means:
Driving alignment on tooling, flows, and coverage requirements ahead of tape-out and first silicon.
Translating product requirements and silicon behavior into structured characterization plans with clear coverage targets, risk areas, and data collection strategies.
Leading methodology transfer into execution - working with team managers to ensure tooling, methods, and engineers are in place for a smooth handoff.
Identifying methodology gaps early in the program cycle and resolving them through cross-functional collaboration.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

We are looking for a best-in-class Senior Full-Chip Verification Engineer with a strong infrastructure mindset to join our Networking Silicon team. In this role, you will be responsible for the development and verification of our next-generation NICs at the system level, while also driving the evolution of the simulation infrastructure powering our verification flows. You will contribute to the architecture of high-speed communication devices by driving full-chip verification execution for the networking solutions powering the world's most advanced data centers, in a meaningful, growing environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Simulation Infrastructure & Acceleration: Identify bottlenecks in the verification flow and engineer creative solutions - building frameworks, optimizing regressions, and accelerating simulation throughput through innovative tooling.

Multi-Language Development: Work across a diverse technology stack (SystemVerilog/UVM, Specman, Python, C/C++, scripting) - writing code and solving problems at every layer, from RTL testbenches to infrastructure utilities and automation.

System-Level Debug & Analysis: Gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance.

AI-Enhanced Development: Accelerate development by leveraging cutting-edge AI coding tools and frameworks - applied to both verification and infrastructure challenges.

Cross-Team Collaboration: Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the NIC.

We are seeking a Front-End Integration Engineer for the NIC Silicon group. Join our team in our Networking business unit and be part of the innovative build and implementation of the next generation Network Adapter Silicon chips. Contribute to the development of powerful communication devices.

What You'll Be Doing:

Own and maintain Continuous Integration pipelines. Monitor, complete, and fix daily and nightly CI flows in front-end build areas. These include Lint, Synthesis, Equivalence Checking and Simulation.

Automate EDA Flows: Build, develop, and maintain robust automation scripts using Python, Tcl scripting, and Shell to integrate EDA tools (Synopsys, Cadence) into automated build pipelines.

Manage Perforce Integration: Maintain multi-IP branch/stream strategies, manage workspace specs, complete hardware build drops, and handle release labels/tags in Perforce (Helix Core).

Support Engineering Teams: Act as the primary point of contact for RTL and verification engineers to debug flow crashes, bottlenecks, environment setups, and CI failure reports.

Enforce Quality Gates: Implement automated check-in and change list triggers to run sanity checks, linting, and style enforcement before code is committed to main streams.

Optimize Infrastructure: Monitor compute farm resources (LSF) and storage usage to reduce pipeline runtime and improve overall execution efficiency.

Our HW team designs innovative end-to-end connectivity solutions for GPU servers. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. Our products are focused on delivering the most optimized power - performance communication solutions for industries like AI, ML, Cloud, Media and Entertainment as well as any other industry that can benefit from our Datastream acceleration.



What you'll be doing:

Lead Pioneering Switch System design from concept to mass production.

Collaborate and integrate with all HW project fields: Board Design, Mechanics, Thermal, PCB Layout, Production, Software/Firmware, RTL and more.

Project decision maker - Technical focal point.

The position consists of product specification definitions, electrical schematics, component selection, layout guidance, hands-on testing in a lab environment, accompanying production and qualification processes.

We are now looking for a Power Optimization and Analysis Engineer! We prides ourselves on having energy-efficient products. We believe that continuing to maintain our products' energy-efficiency compared to competition is key to our continued success. As part of the u/arch team in the Switch group, you will be responsible for analyzing full chip and unit-level power data and driving the FE/BE ASIC teams to improve their units power efficiency; you will be responsible for researching, developing, and deploying methodologies to help our products become more energy efficient. Key responsibilities include developing techniques to model, analyze, and reduce power consumption of our Switches product line.

As a member of Switch u/arch Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for our next generation switches. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.

What You'll Be Doing:

Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.

Develop and share best practices for performing pre-silicon power analysis.

Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.

Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.

Select and run a wide variety of workloads for power analysis.

Prototype new architectural features in Verilog and power analysis.

Our Networking System Product Engineering group is looking for an excellent Software Engineer. The position requires an understanding of HW and SW to provide stable, efficient, smoothly running production tests, to enable high availability, while ensuring the quality of the products being shipped to customers. You will lead the development of our products and raise the bar of the software development quality in the group. We have crafted a team of extraordinary people, whose mission is to push the frontiers of what is possible today and define the platform of tomorrow.

What youll be doing: 

Design and develop automated tests for networking Switches and Adapters while working closely with the HW, ASIC, and SW Engineering teams to achieve a reliable test with high coverage.

Exposed to various aspects of design, DFT, and test of our next-generation network products.

Take a significant part in the definition and development of tests from the development level to the final test of Network-Systems.

Utilize test suites to find, debug and resolve problems with production process.

Ability to drive projects to full execution in time and working under pressure of schedule and multi project environment.

Supporting and fixing bugs of existing code. Supporting production lines for: deployments, patches, maintenance.

Test Verification and Validation (both HW and SW). Troubleshooting and streamlining/optimizing our testing procedures.

We are now looking for a motivated Chip Architect to use your creativity to work on the ConnectX network adapter with the highly inventive and knowledgeable team.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications)

Work on proof of concepts and advance development projects.

Perform research and analysis for current and future architectures.

Craft product design specifications.

Serve as a focal point within the organization and distribute the knowledge that you acquire.

The company's Advanced Research (ARG) team in Yokneam is looking for a Senior Electro-Optical / Board Design Engineer for research and development. The ARG group is doing research and development of next-generation electro-optical devices and EO sub-systems for high-speed communication. Our solutions include laser diodes, photo-diodes, modulators, and electronics for use in optoelectronics. The selected candidate would work as part of a multi-disciplinary team, composed of engineers and researchers, supporting the development of future components and systems, for current and next generations.


What youll be doing:

Take part in research and development of next-generation electro-optical devices and EO sub-systems for high-speed communication.

The candidates tasks will include electrical specification of EO sub-systems and evaluation boards, schematic design, component selection and characterization, layout considerations and implementation, Fabrication and Assembly guidance.

Hands-on development and testing within Data Center interconnect lab environment.

We are looking for a performance modeling architect to join the team and shape, optimize, and explore our future networking chips and solutions. The role is cross-disciplinary, collaborating with hardware, software, and research our teams across the wider. You will lead workgroups towards technical solutions that will influence the heart of cutting-edge networking products. You will solve complex problems, develop innovative solutions and be instrumental in determining the architecture of our next generation of networking solutions.



What you'll be doing:

Thoroughly understand our networking solutions across all performance related aspects.

Develop a C++ simulation model to define and evaluate architectural options for our next generation of networking products.

Understand different trade-offs related to solving performance bottlenecks.

Collaborate and lead technical solutions within architecture, research, hardware, and software teams.

Analyze and model the communication patterns of key DL, GAI, inference, and training applications.

Explore innovative ideas to improve and optimize our chip systems performance.