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We are now looking for a Chip Design Verification Engineer for the Switch Silicon group.

As a Chip Design Verification Engineer in our Networking business unit, you'll join a group of passionate engineers to design and Verification, implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops some of the switch silicon core units.

Plan and Design Verification units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.

Build reference models, verify, and simulate chip blocks/entities according to specifications.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work in a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for a DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take ATPG ownership on different DFT aspects of a project, Arch & planning, pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

We are hiring a Senior PCIe Firmware to the Chip Design PCIe Firmware team. You will be joining a team whose primary mission is to work on groundbreaking technology network adapters and build the core technology of the next generation devices in a wide range of fields - low-level C layer between HW and FWs, C++ verification environment, automation challenges, and Python testing environment.

What youll be doing:

implement FW and verification features in a pre and post silicon environments in the PCIe technology.

Collaborate with other teams in the PCIe group, software, and architecture teams to define and craft legacy and new low-level firmware verification methods.

Improve the existing automated process.

Our Chip Design group is looking for best-in-class Design/ Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to performance.

Daily work involves acquaintance with all aspects of chip development: micro-architecture, Firmware, Production, and Verification.

Engaged in developing cutting-edge technology within the latest PCIe generation.

We are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

We are looking for a best-in-class Chip Design HW Emulation Senior Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in emulating our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. Join our world-class emulation team in Israel. Our focused team takes Switches/NICs/SoCs designs and program the emulators to behave like our silicon. Are you ready to take on interesting problems and craft solutions? Come check out our team.

What you will be doing:

The main responsibility is emulation and prototyping of complex chip designs. This includes defining the methodology and crafting the infrastructure needed to quickly take large chips into hardware emulation platforms.

The job also requires close collaboration with design, verification, and software engineers to enable embedded software and application software development.

Connecting emulator/FPGA based solutions to real external H/W or virtual targets, taking care of complex testbench and different protocols.

This is a role for a versatile engineer that includes RTL design, verification, FPGA partitioning and implementation, scripting, and lab-based bring up of the design.

We seek a highly skilled and innovative Senior system Engineer to join our R&D team. We are looking for a strong background in systems engineering, particularly in optical sensors and visible light cameras. As our system Engineer, you will play a crucial role in the development and optimization of our multidisciplinary system, ensuring its high performance across various applications.
A day in the life and how youll make an impact: Be the lead system Engineer for UVeye products.
* Define system architecture and design for new features and products.
* Collaborate with optics, mechanics, electronics, software, and algorithm teams to develop world-class solutions.
* Support existing products including root cause analysis and solutions to customer issues.

At UVeye, we're on a mission to redefine vehicle safety and reliability on a global scale. Founded in 2016, we have pioneered the world's first fully automated suite of vehicle inspection systems. At the heart of this innovation lies our advanced AI-driven technology, representing the pinnacle of machine learning, GenAI, and computer vision within the automotive sector. With over $200M in funding and strategic partnerships with industry giants such as Amazon, General Motors, Volvo, and CarMax, UVeye stands at the forefront of automotive technological advancement. Our growing global team of over 200 employees is committed to creating a workplace that celebrates diversity and encourages teamwork. Our drive for innovation and pursuit of excellence are deeply embedded in our vibrant company culture, ensuring that each individual's efforts are recognized and valued as we unite to build a safer automotive world.
We are hiring a highly skilled and motivated Generative AI Researcher to join our talented research team. As a Generative AI Researcher, you will be responsible for developing and implementing cutting-edge multi-modality LLMs to solve complex problems and drive innovation across our organization. You will work closely with data scientists, software engineers, and product managers to design, build, and deploy genAI-powered solutions that enhance our products and services.
A day in the life and how you’ll make an impact: Designing, developing, and implementing multi-modality generative AI models and algorithms utilizing state-of-the-art techniques
* Collaborating with cross-functional teams to define genAI project requirements and objectives, ensuring alignment with overall business goals.
* Stay up-to-date with the latest advancements in generative AI, machine learning, and deep learning techniques and identify opportunities to integrate them into our products and services.
* Publish in high profile venues such as Nature, Science, CVPR, NeurIPS, ICML or similar
* Optimizing existing generative AI models for improved performance, scalability, and efficiency.
* Developing and maintaining AI pipelines, including data preprocessing, feature extraction, model training, and evaluation.
* Developing clear and concise documentation, including technical specifications, user guides, and presentations, to communicate complex AI concepts to both technical and non-technical stakeholders.
* Contributing to the establishment of best practices and standards for generative AI development within the organization
* Providing technical mentorship and guidance to junior team members

We are looking for a DPU Power Modeling & U-arch senior Engineer.

We are known as a world leader in providing energy-efficient high-performance products and we continue to invest in the research and development of hyper-efficient SOC architectures. We are continually innovating in creative and unrivaled ways to improve our ability to deliver exceptional Perf/Watt solutions in a wide range of sectors and verticals. Come join our Applied Power team to develop state of the art DPU products.

What you'll be doing:

Lead Power Modeling & analysis of cutting-edge DPU technologies.

You will be contributing to power estimation models and tools for DPU products.

Work on Performance vs Power Analysis for our DPU products lineup.

Lead a micro-architecture of power management features.

Understand the workload characteristics for DPU workloads at System Scale to drive new HW/SW features for Perf@Watt improvements.