The ASIC Group is part of worldwide organization responsible of delivering custom ASIC for NAND based storage application like SSD, USB, SD for various markets such as consumer, automotive and enterprise. The group has all of the ASIC functions internally and working in a full COT mode.
The ASIC-IP design and verification group is responsible for definition, design, verification, and support for all complex IPs that build each SOC done for all segments. Strategic IPs are developed to all areas from retail, iNAND (cell phones and client solution) through Client SSD solution and Enterprise SSD.
As part of the team, you will be part of the global effort to:
Define, design, and document RTL verification environments in System Verilog of complex world wide strategic IPs
Interact closely with architecture teams and all SOC teams
Work and develop under world class ASIC methodology development stages
Significant contribution to design, verification and methodology on making complex IPs and flows
Become a significant person on a growing team
Requirements: BSc in Electrical Engineering
At least 7 years of experience in ASIC Verification with UVM Methodology and System Verilog
Excellent analytical and debugging skills
A good eye for details
Advanced verbal and written communication skills
Collaborates to develop self and others within group
Team Leading Skills - Advantage
Knowledge in PCIe - Advantage
This position is open to all candidates.
